High speed memory access, extended memory system and reduced power consumption are features that are demanded from semiconductor devices. In recent years, a computer system has been provided that adopts hybrid memory system as a main memory system including a plurality of types of memory devices (e.g., dynamic random access memory (DRAM) and storage class memory (SCM)), and the main memory system provides volatile memory and non-volatile storage and various access speeds. For example, a typical memory access to the DRAM is high in speed, however its storage is volatile and its capacity is approaching to its limit. On the other hand, the SCM provides non-volatile storage and easy scaling to increase its capacity, however the SCM provides slower access speed than the DRAM. Thus, depending on the required access speed and volatility, a user can select one of these memory devices to store data.
A typical memory access to the hybrid memory system including the DRAM and the SCM may be executed by a memory controller that uses the same memory channel. In data transfer between the DRAM and the SCM, the memory controller reads data in one memory device in the hybrid memory system and temporarily buffers the data, and then writes the buffered data into the other memory device in the hybrid memory system. Thus, the same memory channel limits access to each memory device. Further, power consumption may be increased due to considerably large stray capacitance of wirings between the memory controller and the plurality of memory devices.